The company uses direct “gas-to-wafer” epitaxial technology to produce its solar wafers which achieved 24.4% efficiency on ...

Laser ablation results in smaller chipping on both the top and bottom sides of the die, as well as a narrower kerf width.

The German wafer manufacturer said the result was achieved with an unspecified M6 HJT commercial production line, without ...

The light activates a photoresist on the surface, which allows the etching of a pattern on the wafer. Through successive iterations of photolithography and the deposition of metals, devices with ...

The company also announced an even more ambitious technology named System-on-Wafer (SoW) that will allow for 3D stacking of logic and memory directly on top of a 300mm wafer-sized chip.

The Biden-Harris Administration has imposed export controls and technology restrictions on China's advanced chip sector from ...

As TSMC's Kumamoto fab kicks off operations, this marks the first time logic chips featuring FinFET transistors have been ...

The Recharged Czochralski (RCz) crystal growth process, which enables crucible re-use without powering down between pulls, is increasingly used to produce ingots for both n-type and p-type wafers ...

N2 NanoFlex and GAA nanosheet transistors make TSMC’s 1.15x increase in chip density possible. The gate-all-around tech marks ...

TSMC's first wafer fab in Kumamoto, Japan, operated by its subsidiary Japan Advanced Semiconductor Manufacturing (JASM), has ...